Soutenance de thèse de Mr Jing WAN

This thesis is dedicated to conceiving and studying sharp switching devices, including the tunneling field-effect-transistor (TFET) and a new feedback device (Z2-FET), for low power logic and memory applications.
We have investigated TFETs with various gate oxides, channel materials and structures for enhancing the drive current (ION) and reducing leakage (ILEAK).
A new class of TFET (BET-FET: bipolar enhanced tunneling FET) combining
tunneling and bipolar amplification is developed showing excellent performances, with ION > 4000 A/m and SS <60 mV/dec over 7 decades of current.
We also conceived and demonstrated a new device named the Z2-FET (zero subthreshold swing and zero impact ionization), which exhibits extremely sharp switching with SS < 1 mV/dec, ION/IOFF ~ 109, gate-controlled hysteresis and scalability down to 20 nm. The Z2-FET is used for capacitorless 1-T DRAM with supply voltage down to 1.1 V, retention time up to 5.5 s and access speed reaching 1 ns.