Wednesday, April 15, 2026 from 9:30 a.m. to noon
Abstract :
The goal of the NOMADAC project is to address the issue of delay in the circuit design cycle, related to time-domain noise simulations, by proposing solutions of noise modeling methods and tools that can significantly accelerate the simulation time of noise-aware circuit design.
Taking advantage of UGA’s expertise in transistor noise modeling and AUTH 's (Aristotle University of Thessaloniki) experience with circuit noise and automated circuit design, a variety of methods for time domain noise modeling will be explored, along with different model implementations (Verilog-A and C) in circuit simulations. All types of electronic noise will be considered: thermal, flicker (1/f), generation-recombination (g-r) and random telegraph noise (RTN). The developed method’s performance will be benchmarked against already existing ones, for circuits like VCOs, Mixers, ADCs (Analog-Digital) and DACs (Digital-Analog Converters).
This mini-workshop aims to present the project's ambition and the relevant research activities of the CMNE (CROMA) and ASIC LAb (AUTH) teams, followed by a presentation of some preliminary project results and peripheral activites of the DHREAMS (CROMA) team.
Documents to download
Date infos
Wednesday, April 15, 2026 from 9:30 a.m. to noon
Location infos
BELLEDONNE room3, Parvis Louis Néel , CS 50257
38016 Grenoble Cedex 1
VIDEOCONFERENCE :
ZOOM link:
https://grenoble-inp.zoom.us/j/93499328064
Meeting ID : 934 9932 8064
Password : 826872