PhD Defense of Blend MOHAMAD

Abstract:
Thin film technologies appear as reliable solutions for Nano electronics to go beyond bulk silicon technology limits, allowing lower power bias and thus energy harvesting. Indeed, Metal Oxide Semiconductors transistors (MOSFETs) with fully depleted substrate (FDSOI for « Fully Depleted Silicon On Insulator ») allow low static off-currents and variability improvement that enable the use of power supply biases lower than with bulk silicon, especially for SRAMs. From 14nm nodes, FDSOI generations are including SiGe P channel, high-k dielectric and metal gate. All these new process modules required for technology improvement also significantly increase the complexity of the MOS devices electrical analysis and meanwhile its correlation with technology. This PhD study propose different novel methodologies for automatic and statistical parameter extraction of advanced FDSOI MOS gate stack. These methodologies are all based on capacitance versus voltage (C-V) characteristics, obtained for the capacitive coupling between metal gate, channel and back side.  With such C-V characteristics, reliable methodologies are proposed, leading to the extractions of the equivalent oxide thicknesses (EOT), the effective work function of the FDSOI metal gate (WFeff), but also other parameters such as channel and buried oxide thicknesses and an effective electron affinity of the substrate well  (Xeff) that includes all electrostatic effects in the buried oxide and at its interfaces. Moreover, quantum simulations are considered in order to validate the different methodologies. For experimental analysis, the study has considered coherence and complementarity of different test structures as well as the impact of back substrate polarization.