PhD Defense Anouar IDRISSI EL OUDRHIRI

In microelectronic, the device's performance evolution is limited by the down-scaling. The mechanical stresses are a potential mobility booster to overcome these limitations. However it is essential to properly control their process integration and to understand their influence on channel transport. The aim of this thesis is to study the mechanical stress evolution in CMOS technology and its impact on electronic transport in sub-20nm realistic technologies. This work is based on bidimensional mechanical simulations. Different architectures FDSOI and TriGate are then studied. The simulated stress maps are compared to experimental characterization from electron diffraction. Several methods of electrical characterization and extraction of MOS transistor are used, especially the magnetoresistance technique. We analyze the mechanical stress impact on the mobility variations according to geometrical dimensions. Finally, we use the TCAD simulation in order to explore the potential of new innovative devices under development for future generations. Among them, the integration of high germanium concentration in source-drain regions or the impact of relaxations induced by dummy gates in process flow. In this perspective, electrical simulations based on piezoresistive approach become essential.

Keywords:
Advanced CMOS, mechanical strain, simulation, channel transport, modeling, electrical characterization.

      

Members of the jury :