PhD defense of Guillaume BESNARD

With an industrial introduction on a 28nm technology node, planar FDSOI becomes an excellent architecture to address Low-Power and Ultra-Low Power applications. One of the most interesting technology is back-bias which enables efficient Vth management in order to increase performance or decrease power consumption. Thus, in addition to ultra-thin silicon film, FDSOI wafers integrate ultra-thin buried oxide to enable this Back-Bias technology.
We present the study of the reliability of UTBOX thorough different electrical characterizations in order to evaluate their lifetime and the impact of their degradation on the devices. First, we will compare the reliability of these buried oxides to the initial thermal SiO2, especially by charge-to-breakdown measurements (QBD). By this way, several optimizations will be proposed in order to improve this reliability. Then, we will try to understand, explain and model the wear-out mechanisms evolved for UTBOX by bulk oxide and interface degradation monitoring.
Finally, we will present the degradation of the back interface and the impact on the characteristics of the transistor. In this context, we also compare standard unstrained FDSOI devices with tensely-strained FDSOI devices from sSOI substrates. These strained substrates are really interesting and are planned to take part of the 10nm FDSOI technology node and below in order to increase the performance of NMOS transistors.

Members of the jury :
•  Brice GAUTIER,   Professor -INSA de Lyon/INL,  President
• Sorin CRISTOLOVEANU, Director of research-CNRS, Supervisor
• Alain  BRAVAIX,  Professor- ISEN Toulon/IM2NP, Rapporteur
• Guido GROESENEKEN, Professor- KUL/imec, Rapporteur
• Xavier GARROS,  Engineer - CEA-Leti, Co-supervisor
• Frédéric ALLIBERT,  Engineer -Soitec, Co-supervisor
• Xavier FEDERSPIEL, Engineer- STMicroelectronics,Guest