SULER Andrej

PhD defense of SULER Andrej

" Development of a back side illuminated photogate pixel "
Tuesday, January 15th,  2019 at 14:00

Abstract:
Nowadays image sensors look neither to be efficient, but rather to be adapted to their environment or to new uses. Autonomous machines and vehicles can be mentioned for instance.
Because of image quality and cost, a large majority of applications employs CMOS pixels and pinned back-side illuminated photodiodes. The originality of the solution proposed in this manuscript relies on the integration of a photogate, used by CCD sensors, inside a CMOS pixel. Its use optimize the available space inside the pixel and decrease the number of implantation needed to its realization.
This development has also led to the use of specific transfer gate. Both structures have been created during this thesis and designed using simulation and specific test structures. The characterization of the developed pixel demonstrate many assets such as an increase of saturation charges and a reduction of dark current. Furthermore, a detailed study of the dark currant indicates a more gathered pixel distribution, allowing the identification of contaminants and a better temperature handling in comparison to a classical photodiode. The proposed structure offers many perspectives such as reduction of the pixel pitch or its potential use in an environment with a temperature constraint.
 
Members of  jury :
  • Mme. Panagiota MORFOULI, IMEP-LAHC, Supervisor
  • M. Laurent MONTЀS, IMEP-LAHC, Co-supervisor
  • M. François ROY, STMicroelectronics, Co-supervisor
  • M. Jean-Emmanuel BROQUIN, INP Grenoble, Examiner
  • M. Yvon CAZAUX, CEA Grenoble, Examiner
  • Mme. Hélène TAP, INP Toulouse, Reviewer
  • M. Guo-Neng LU, UCB Lyon, Reviewer

 

Partenaires

Thesis prepared in the  laboratory IMEP-LaHC , supervised by  Panagiota MORFOULI , supervisor and   Laurent MONTES , Co-supervisor .
Date infos
Defense of the doctoral thesis of SULER Andrej,  for the University Grenoble Alpes, speciality  " NANO ELECTRONICS & NANO TECHNOLOGIES ", entitled:
Location infos
Room Z104 (Bâtiment Z) - Phelma/Minatec
3 rue parvis Louis Néel
38016 Grenoble cedex1